Connectivity is at the heart of electronic function – without reliable physical connections to support electrical continuity, a PCBA is much closer to an expensive paperweight. The readily apparent traces on the board’s surface highlight connectivity within the plane, but what about inter-layer connection? The PCB via fills this role: it can tunnel through to the opposite side of the board or dive to a controlled depth, depending on the fabrication method.
As the z-axis counterpart to the x- and y-plane trace, the via is a fundamental feature of the board’s layout. However, a via’s manufacturing considerations and constraints differ greatly from a copper trace’s. Furthermore, there are more design aspects that vias can account for – like microvias and via-in-pad for HDI boards – that designers must be aware of, including the relative fabrication costs.
The Different Types of PCB Vias (adapted from IPC-4761)
|Type I – Tented vias: To prevent corrosion, a dry film mask layer covers the via’s hole and annular ring. The process can apply to one or both sides.|
|Type II – Tented and covered vias: An additional masking layer covers the Type I via. The process can apply to one or both sides.|
|Type III – Plugged via: A fill material plugs the entrance to one or both sides of the via, leaving an air gap in the center.|
|Type IV – Plugged and covered via: As in Type III, but with a covering layer over the plugging material. The process can apply to one or both sides.|
|Type V – Filled via: A complete fill of the internal space of the via barrel.|
|Type VI – Filled and covered via: As in Type V, but covered with a solder mask layer. Covering material can apply to one or both sides of the via.|
|Type VII – Filled and capped via: As in Type V, but a secondary metallization encapsulates the via on both sides.|
An Introduction to PCB Vias
The process of via manufacturing primarily involves a two-step process, although there are multiple supporting sub-processes for quality. As part of the manufacturing files, layout designers generate a drill chart indicating the true x- and y-position of a drilled hole and its finished hole diameter, typically fabricated through mechanical drilling. “Finished” is a crucial qualifier, as drilled holes are either plated (vias being a specific sub-category) or non-plated; plating reduces the diameter after drilling due to the material deposition. Plating requires a seed layer on the surface of the drilled hole for copper adhesion before immersion into an electroplating tank for the requisite via barrel characteristics. Finally, technicians apply a layer of tin to prevent the copper from oxidation and instill long-term reliability into the bare board.
Since the via is a critical routing feature, it occurs numerous times throughout a design – often in the hundreds, and via counts in the thousands are not rare for larger boards or HDI. Therefore, a significant amount of routing area can open up by shrinking the diameter of the via design; however, fabrication and assembly outcomes are not so straightforward. Larger holes have better plating results than smaller ones, but the former can also provide more heat-sinking capabilities during soldering, creating incomplete or inadequate solder joints. In the case of two-terminal components, this thermal mismatch between pads can manifest as tombstoning, where chip components stand on one end due to unequal cooling rates. While diameter size is the defining aspect of vias, designers will want to confer with manufacturers at an early stage to guide design rules for layout optimization and reproducibility.
An additional consideration of via size is its limiting factor. Designers desire to shrink designs for numerous reasons, but the aspect ratio impedes traditional fabrication methods. The aspect ratio is the ratio of the hole depth (the board thickness for through-holes) to the hole diameter, preventing overzealous designers from shrinking the via opening to a size that lacks long-term reliability. As the hole diameter shrinks relative to the depth, plating becomes more inconsistent towards the middle of the via barrel. Since this area already experiences significant stress/strain due to the coefficient of thermal expansion (CTE) discrepancy between it and the surrounding substrate, the aspect ratio effectively creates the minimum via hole diameter.
Optimizing Layouts with Advanced PCB Via Structures
For specific circuit applications, designers want to increase the trace width from the standard value to support a greater current density. A similar method for increasing the current capabilities of a via is not to adjust the size (which complicates both design and manufacturing) but to increase the number of vias. Via arrays can prevent bottlenecking of high-current traces, tie power/ground pours to internal layers, directly connect the nearby area of an expansive copper pour to ground, or prevent crosstalk between a high-speed RF trace and its neighbors.
Modern component packaging has shrunk enough that integration with traditional via structures exceeds manufacturing capabilities. The BGA is the perfect example: the minimum acceptable through-hole via diameter is far too large to enable signal breakout from thousands of fine-pitch pins. The solution is to simultaneously shrink the via hole diameter and depth, allowing for miniaturization without sacrificing the reliability of the bare board. Today’s compact HDI designs would be impossible without the abilities of the microvia, but fabrication is costlier. As microvias only span two layers of the board, lamination of the copper layers and the substrate becomes a multi-step process that decreases yield and adds additional processing.
Even in vias with pristine plating, thermal mismatch between a via barrel and its surroundings is a long-term reliability concern that can become more pronounced for PCBAs in high-temperature environments or operations with frequent temperature swings. Via filling adds material to the space within the via barrel to better match the surrounding CTE and increase lifetime reliability. This material can be conductive or non-conductive; typically, non-conductive is suitable for the cost and better CTE matching, but conductive fills offer enhanced thermal routing capabilities. Additionally, a filled via prevents solder wicking that can undermine joint quality or shorts on the other side of the board.
The ultimate space saver for HDI designs, via-in-pad utilizes the copper lands for placement, ensuring the maximum amount of routing space is available. Via-in-pad also improves signal integrity by providing the most direct path between pins. This fabrication option comes at an appreciable cost owing to additional processing and rejection during inspections.
Your CM Gets To the Bottom of Via Design
PCB vias are more complex than a simple plated holed may appear at first blush, and given their ubiquitous nature in PCBA design, understanding the full implications of design choices will improve the final product. Design for manufacturing (DFM) requires collaboration between the designer and manufacturer to meet the project’s design intent while keeping yield high and costs low. In other words, the earlier designers work with their manufacturers, the better the outcome. At VSE, we’re a team of engineers committed to building electronics for our customers – we utilize a comprehensive review process to ensure every detail of your board offers the highest possible quality. Alongside our valued manufacturing partners, we’ve brought several life-saving and life-changing products to market with a rapid yet thorough approach to PCBA design, manufacture, and testing.