I love to cook, but baking has always been challenging. There’s something about the hands-off nature of baking once something goes into the oven that eludes my comprehension—having to modify cooking times for the cross-sectional area and surface area to finish at approximately the same time is a challenge when a recipe makes it hands-off.
PCBs also encounter thermal mismatches that can ultimately undo the final product. Drilling evacuates material, and plating deposits only a thin layer that does not absorb heat and expands at the same rate as the substrate. This action can eventually cause early failure of the via (or other PTH), but via filling is a seemingly roundabout method that maintains structural integrity.
COMPARISON OF VIA FILL TECHNIQUES |
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|---|---|---|
| Advantages | Disadvantages | |
| Roller coating—fill material deposits into the vias through roller action. Squeegees then remove excess fill material on the board surface. | Rapid filling; no stencils required Planarization simplifies as the board surface should be clean and level | Must mask off no-fill vias
Requires considerable volume of via-fill materials; shelf life becomes a priority |
| Screen printing—a stencil is printed and drilled to match the filled via artwork. The process then fills all pertinent vias in a single action. | No worry about accidental fills
Greater control of process parameters |
Additional run-up time for stencil fabrication
A considerable variance in hole diameters can undermine the effectiveness |
| Vacuum plugging—an automated system. Can perform double-sided fills for blind vias simultaneously. | Highly adjustable
Missed via-fills can remain in the process for quick resolution |
The most expensive equipment option |
The Motivation for Via Filling
The via-filling process responds to reliability issues associated with standard via production. In terms of continuity, a via is simply a vertically-oriented trace. However, the long-term quality outcomes diverge because the fabrication method of drilling and plating is much more involved than etching on a plane. Primarily, the thermal cycling of the board develops a stress-strain matrix at the interface of the via barrel and surrounding substrate due to a difference in the z-axis coefficients of thermal expansion (CTE).
CTEs are intrinsic material properties, and while design can opt for a CTE closer to the substrate material, the absence of material within the via barrel also contributes to an uneven heating profile. The solution is to deposit a material inside the via barrel and cap it shut to more closely align the z-axis expansion of the via with its surroundings, preventing intermittent connectivity and open circuits owing to thermal cracking.
The fill material itself broadly fits into two categories: conductive and non-conductive. The material conductivity does not affect the electrical continuity of the via but impacts the thermal routing. Most designs settle on a non-conductive epoxy fill as the CTE better matches that of the board material, ensuring stable performance and high reliability over the device’s service life. The conductive fill option is less popular by a significant margin, but it can act as a thermal management solution as it improves the heat flow through the via barrel.
Since thermal vias do not require any extra space in the layout (unlike copper pours or more robust heat sinks), they can be exceptionally vital in HDI designs looking to squeeze additional functionality out of a limited area. Two possible applications are a grid of thermal vias within the thermal pad of a flat-pin SMD package or BGA via-in-pad.
Beyond thermal performance, via filling protects the long-term function of the via by serving as a physical barrier to contamination. Via filling offers two direct advantages to assembly:
- It serves as a barricade to solder capillary action wicking up the via and shorting connections between components on the other side of the board during wave soldering.
- It prevents solder paste from wicking into the via and undermining the quality of the joint; dogbone via arrays found in larger-pitch BGAs can be susceptible to this failure mode.
How Via Filling Affects Design and Fabrication Workflow
The process of material selection post-plating involves a careful balance of via design elements, namely the diameter, structure, and the drill’s depth versus the hole’s diameter (also known as the aspect ratio), further complicating the process. In general, designers should consult with manufacturers to optimize via characteristics:
- The finished diameter of the via is critical to the success of the filling process: too small and the filling material cannot easily flow into the opening, but too large and the filling material will run out of the opening. The exact values will differ by manufacturer equipment and expertise, but filled via hole diameters typically start near 8 mils/.20 mm and max out around 18 mils/.45 mm.
- Plated through-holes and blind vias are the only via structures compatible with filling. However, this process can iterate for microvias to form stacked and staggered via structures.
- The aspect ratio must remain below 10:1; while this is required to ensure the via barrel’s integrity, it takes on a different aspect for via-filling. An incomplete filling due to an aspect ratio above DFM acceptability results in a plugged via. A double-sided plugged via has additional reliability concerns related to outgassing which can crack and rupture the via structure. While a single-sided plugged via can sidestep outgassing problems, this configuration sacrifices the main benefits of via-filling.
Via filling can be universal to a design, but designers can also designate fill/no-fill styles individually. Designers have this option because the manufacturer must complete the via-fill process before further drilling on the bare board. Essentially, the additional processing steps amount to a secondary drill stage that finishes with the fill material pushed into the via before baking. Therefore, designers can create an extra layer in the board file (and associated artwork) that provides a quick reference of all the vias for filling.
Your CM Can Fill You In On All The DFM Details
Via filling is a fabrication method that enhances vias’ service lives and performance by adding a material that matches its CTE to the surroundings. Additionally, filled vias can boost thermal routing away from generating sources to mitigate wear on devices, which stabilizes power systems. The impact on fabrication is substantial in terms of cost and per-board processing time, so via filling should be employed judiciously to avoid complicating PCB manufacturing.
For a better idea of suitability, our engineers are committed to building electronics for our customers, including a thorough design review that ensures maximum DFM fitness. VSE has turned designs into life-changing and life-saving products alongside our manufacturing partners over the past four decades.
