It’s amazing to consider how far certain technologies have developed within a couple of decades. Though I only experienced it partially as a child, I still vividly recall the days of dial-up internet. The sounds of digital tones performing the world’s most grating backing track gave way to seemingly unlimited possibilities. However, imagine for a moment having to return to dial-up from current internet speeds – it would be unbearable, right? The newest and shiniest technologies can only go so far without support from the necessary systems to maintain an expected level of quality.
The ever-growing internet of things (IoT) continues to be an engine of market growth, but it is severely limited without the build-up of network infrastructure. As devices continue to grow in complexity, designers need to understand the basic topology of 5G and how to implement 5G circuit design practices best to reach optimal performance.
A Synopsis of 5G: Its Challenges and Solutions
5G is an emergent technology, and one of the major motivators for the architecture is adequately handling the massive amount of simultaneous data transfer within increasingly crowded bandwidths. IoT not only promises to bring more devices online, and densely populated urban areas are already reaching saturation points with prior mobile network generations.
A major delineation in structure is the massive multi-input multi-output (mMIMO) design that trades broad signal broadcast for a more directed beam. The antenna is split into an array capable of multiplexing based on the devices’ location in space, with each miniature antenna communicating directly via line-of-sight to achieve this. Due to its limited access, this technology is unlikely to supplant current network implementations. Still, it can act as a release valve during heavy impact by improving transfer rates by a magnitude over current speeds.
The transition to an antenna array is necessary to avoid fast-rising congestion, but there are still a host of issues designers must mitigate. Antenna placement on the device can easily be obscured through incidental hand placement by the user. This issue can be resolved with multiple antenna sub-arrays distributed throughout the design which would make unintentional simultaneous disruption impossible or a possible increase in product size that improves the detectability for sub-antennae by providing additional angles to contact the signal. Regardless, either option increases per-unit cost, and design teams must determine the best way to optimize around a technology that is not fully explored.
An additional consideration is the operating bandwidth for the 5G circuit. Sub-3 GHz and 3-5 GHz wideband are more crowded than 28+ GHz mmWave bands, but the higher frequencies carry additional noise on the operating signals. Noise can become compounded by many concurrent users within the same band, leading to performance degradation and errors in transceiving. Additionally, the signal exhibits more free-space loss and attenuation and poorer penetration. The size of an antenna decreases inversely to the frequency, providing the basis for the array configuration and the gain experienced by the total array.
5G Circuit Design Requires Contributions From Layout and Manufacturing
Maximizing performance with 5G chipsets means ensuring the board is well-suited to meet the complex demands of high-speed RF. Not only do designers have to balance an HDI design with many complex timing functions, but they must also be aware of how the physical properties of the board influence performance:
- Signal integrity: Noise associated with an increase in frequency has already been mentioned as a significant concern for 5G boards, but additional compounding factors exist. Reflections and ringing, signal coupling, and losses due to skin effect all become magnified at higher frequencies. Appropriate countermeasures must be adopted to prevent these issues from undermining total performance. For reflections, layout designers need to place and route carefully to avoid the inclusion of branching conductor paths, while manufacturing must remove stubs on via barrels through back-drilling. Coupling can be prevented by the additional spacing between conductors (both in-plane and between planes). Additional features like guard rings and traces can be utilized (space provided) to shield especially vulnerable signals. Skin effect is unavoidable in high-frequency applications, but careful material selections based on dielectric constants, weave tightness, and dissipation factors can minimize the impact.
- Thermal routing: The effect of high-speed RF on temperature remains an overlooked aspect. A problem with many common speed tests is they look at performance over short bursts, which is not conducive to stress testing and operation under duress. The better the thermal regulation, the longer a device can operate at maximum speeds, a clear benefit and a selling point to end users. Dissipation should be analyzed both at the board and enclosure level; for layout designers, include plenty of thermal vias and pours for any areas of high current draw.
Your Contract Manufacturer Can Build for 5G – And Beyond
5G circuit design continues to evolve with the underlying technology, and designers and manufacturers must be ready to embrace new changes while supporting current best practices. Though the nascent technology is settling, there is still much fluidity in terms of production to create the best possible device for highly complex hardware and software integrations. As a professional PCB manufacturer with over 40 years of industry experience and a team of engineers committed to building solutions for our customers, we pride ourselves on the cutting-edge boards we create alongside our professional manufacturing partners. Whether it’s for the PCB challenges of today or tomorrow, VSE embraces our role of making your designs a reality.
