When I play tabletop games, I love to spend an inordinate amount of time on character creation. This is where the character’s story, motivations, and background are fleshed out to give the persona a semblance of belonging in a fantasy world. In addition to the creative portion, character design allows one to define the parameters for how skilled the character is in specific tasks.
Like statistic blocks, PCB design guidelines for EMI/EMC entail some give-and-take with design parameters. It’s impossible to get something for nothing — tweaking one element of the board inevitably results in some compensating effect elsewhere, whether that was the designer’s intention or not. Electromagnetic interference/compatibility is an attribute of design that must be carefully considered, as a non-compliant board cannot move forward in production until the danger associated with driving or receiving coupling is alleviated.
EMI/EMC is pervasive throughout the design and taking into consideration the many ways in which it can be accounted for, represents an opportunity for a discerning layout engineer to potentially limit EMI without the need for additional shielding. However, the balancing act of particular layout jobs may require that EMI/EMC is addressed via shielding materials after the finished board is prepared for a final inspection.
What Do PCB Guidelines for EMI/EMC Entail?
EMI is the process of some emitter source influencing the victim signal via conductive, radiative, capacitive, or inductive coupling. Essentially, the energy of some source affects the behavior of a signal unintentionally according to the original design intent. Due to its somewhat random nature, EMI can run the gamut from momentarily benign to life-threatening. Beyond logic runtime false triggers, it could also cause damage to board components, potentially leading to rework or scrap.
EMI/EMC design synthesizes many design techniques to minimize the chance of occurrence and the ability to influence/be influenced by outside EMI. Below are some common strategies a layout designer can utilize to curb EMI:
- Board stack-up: Genuinely, the stack-up design first comes into play in field solvers while determining the dimensions for single- and double-ended traces to meet certain impedance values. However, the designation of the planes in the stack will determine the distance a signal needs to travel between trace, ground plane, and power plane.
A high capacitance, modulated by decreasing the distance between planes, will reduce the susceptibility to voltage changes, thereby containing the electric field. Further, proper allocation of signal, ground, and plane layers through the board will minimize the signals’ traveling distance. Properly routed signal layers sandwiching return layers need only span the three layers in question, reducing EMI by minimizing the loop of the return path.
- Decoupling capacitor placement: Decoupling capacitors offer the most direct return path between the trace, power plane, and ground plane. In high-frequency applications, the inductive impedance component dominates the expression, and the return current begins to follow underneath the trace rather than through vias. The current loop is confined to a smaller area, decreasing its magnetic flux and coupling ability by keeping the distance between traces, power, and ground planes short.
- Plane design: Foremost, ground is ground. This simple reflexive statement belies a common misconception about analog and digital circuitry requiring separate ground planes. There are cases where isolating noisy, low-frequency signals from sensitive components is necessary. Generally, digital and analog devices are fine to share the same ground, and creating a split plane will likely result in additional routing complications. If signals referenced to this plane pass over the gap, the return loop will increase in size, compounding an EMI issue the split plane was implemented to prevent.
- Routing: Short traces are key to inhibiting large loops and excessive EMI. Particularly for high-speed, clocks, and I/O lines. A longer trace presents a greater coupling ability for signals due to their inherent noisiness. Avoid routing high-frequency signals underneath these critical lines, and consider burying critical signals within the board where coupling effects are further diminished.
Shielding: A Boon to EMI/EMC Design Practices
If a finished board is still non-compliant with EMI guidelines, shielding can offer a chance to reduce radiation to allowable levels without significant revisions. It must be noted that shielding exists as a treatment to alleviate EMI and not a cure (that would be revisions at the board level to correct the causes of EMI). However, PCB design involves trade-offs in multiple performance areas, and a well-designed board that was unable to prioritize EMC may benefit greatly from shielding.
To understand the conceptual mechanism of a shield, consider what happens to a wave when it reaches a material boundary of different electrical properties. The incident wave will decompose into a reflected wave and an absorbed wave that will decompose a second time upon reaching the further boundary of the material. Ultimately, the original incident wave will be twice attuned (once at each boundary), passing through the shielding material, greatly diminishing its EMI effects. This model is known as the plane-wave shield theory.
Though the expressions generated from plane-wave shield theory are valid, observed and calculated values have some disconnect. The theory operates under the assumption of far-field effects for both the emitter and receiver, a condition that is unlikely to occur. In its place, near-field shielding assumes an emitter (either an electric monopole or magnetic dipole) is at a distance r from the shielding material such that r << 𝝀 (wavelength). At this distance, the characteristic impedance of the wave can assumedly be either the permittivity or permeability of free space for a charge or magnetic dipole, respectively.
The physical design of the shield can take many forms depending on the board shape and the coupling it is built to deter. Electric field shields, commonly referred to as Faraday cages, are either partial or full enclosures. Plates may also be utilized to form an impasse against the strongest field lines when an enclosure may be cost- or design-prohibitive.
Shielding against magnetic fields can be accomplished in one of two ways: redirecting time-variable magnetic fields around the board eddy currents with an electrically conductive shield, or redirecting magnetic field lines with a permeable material for low-frequency magnetic dipoles.
Your PCB Contract Manufacturer Knows the Ins and Outs of EMI/EMC Design
From both a technical and applicable point of view, PCB design guidelines for EMI/EMC are intricate and vital for product certification. With the bulk of the design process complete, you don’t want your boards held up from reaching the market due to EMI design failures.
VSE can provide an engineering insight and approach to solving your most pressing EMI/EMC issues. Here, we build electronics for customers by engineers. VSE will collaborate with you and our diligent partners to diagnose and correct EMI issues and ensure your board is ready to pass inspection. We take your design just as seriously as you do, and our goal is to provide the engineering solutions necessary to keep your operations moving swiftly.